A Study of Microprocessor Implementation of Time Reference Distribution.

Abstract

The dissemination of a Time Reference throughout a network is useful in the operation of a switched digital communication network. The Time Reference Distribution Method (TRD) is a hierarchical scheme of dynamically allocating information paths for the flow of such reference information from the master node to all the other nodes in the network. This report is a detailed study of the feasibility of using a currently available microprocessor at each node to implement the TRD algorithm. The characteristics of some current microprocessors are studied. Three different implementation algorithms are developed for the dynamic allocation process. A sample design of microprocessor system for one of the algorithms is presented. A estimate of the computing power needed is made and implementation problems are discussed. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Jun 01, 1977
Accession Number
ADA042448

Entities

People

  • David A. Perreault
  • Julius F. Bogdanowicz
  • Komandur R. Krishnan
  • Rangaswamy Mukundan

Organizations

  • Clarkson University

Tags

Communities of Interest

  • Advanced Electronics
  • C4I
  • Energy and Power Technologies
  • Materials and Manufacturing Processes
  • Space
  • Weapons Technologies

DTIC Thesaurus Topics

  • Air Force
  • Central Processing Units
  • Coding
  • Computer Programming
  • Computer Programs
  • Computers
  • Digital Communications
  • Electrical Engineering
  • Engineering
  • Engineers
  • Instruction Set Architecture
  • Microprocessors
  • Plastic Explosives
  • Reliability
  • Semiconductors
  • Test Equipment
  • Time Intervals

Readers

  • Computer Science/Computer Engineering/Data Science/Digital Signal Processing.
  • Radio communications and signal processing.
  • Team-Based Human-Centered Cognitive Task Decision Making and Information Performance.