Analysis of Memory Addressing Architecture.

Abstract

This research investigates the process of generating memory addresses within computer programs and evaluates methods for making that process more efficient. The approach taken here is to separate program execution into a computation process and an addressing process. The addressing process generates the memory reference stream for the computation process (and incidentally for itself as well). The memory reference stream of the computation process is then modeled probabilistically and its information content derived. Several techniques are presented for improving addressing efficiency with standard computer architectures.

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Document Details

Document Type
Technical Report
Publication Date
Jul 01, 1977
Accession Number
ADA044313

Entities

People

  • Daniel Wayne Hammerstrom

Organizations

  • University of Illinois Urbana–Champaign

Tags

Communities of Interest

  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Algorithms
  • Charge Coupled Devices
  • Computations
  • Computer Architecture
  • Computer Programming
  • Computer Programs
  • Computers
  • Electrical Engineering
  • Electronics
  • Electronics Laboratories
  • Graphs
  • Illinois
  • Information Theory
  • Large Scale Integration
  • Probability
  • Random Variables
  • United States

Fields of Study

  • Computer science

Readers

  • Computer Science.
  • Mathematical Modeling and Probability Theory.
  • Systems Analysis and Design