Burstlogic: Design and Analysis of Logic Circuitry to Perform Arithmetic on Data on the Burst Format.
Abstract
A family of Processors has been developed to perform arithmetic on data in the Burst Format. The common building block of these circuits is a simple finite state machine called the Perverted Adder (PA) which performs BURST addition. The interconnection of PAs in a tree formation with some additional circuitry produces a Burst multiplier or divider. A PA CPU has been constructed to demonstrate these PA designs. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- May 01, 1977
- Accession Number
- ADA046974
Entities
People
- Leon Clemens Tietz
Organizations
- University of Illinois Urbana–Champaign