EMMY/Unibus Interface. Preliminary Specification.
Abstract
An interface unit to allow communication between the EMMY System bus and a DEC PDP-11 Unibus is described. The interface consists of three functionally independent elements--an EMMY master/Unibus slave unit, a Unibus master/EMMY slave unit, and a memory management unit. The EMMY master unit allows the EMMY system to act as bus master on the Unibus. The 32 bit EMMY bus address is truncated for use on the Unibus. The Unibus master unit allows the Unibus to act as master on the EMMY bus. The 18 bit Unibus address is mapped into the 24 bit EMMY address space through the use of one of two techniques. The first utilizes a Page Table consisting of Four Page Setup Registers. A CAM is used to associate 2K (16 bit) halfword pages of Unibus address space with 1k (32 bit) word pages of EMMY address space. The memory management element makes the Page Setup Registers accessible to both system buses as device registers on the Unibus. The second uses a fixed page address and demultiplexor to recognize addresses for translation. The memory management facility provides mapping of pages in the Unibus address space other than the base page and the upper two pages (which are reserved for use as device registers by Unibus convention). Logical pages may be removed from the Unibus by associating them with the base page or device register area. The reader is assumed familiar with the EMMY system and the DEC PDP-11 Unibus. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 1976
- Accession Number
- ADA051752
Entities
People
- Walter A. Wallach
Organizations
- Stanford University