LSI Implementation.

Abstract

This program emphasizes practical hardware objectives in LSI form for implementing digital filters as a general class of applications and the Fast Fourier Transform (FFT) algorithm as a specific application. Three LSI chip designs were completed, the SPAU for signal processing arithmetic unit, the SPDL for signal processing delay line, and the SPAC for signal processing address control. The most comprehensive design, the SPAU, went through two design iterations and the final version has achieved a high degree of acceptance for general filter processing applications. Twenty-five chips each of the SPAU and SPAC designs were delivered. Fifty units of the SPDL were delivered as well as hardware samples of work in progress from time-to-time. Insofar as practical, universal designs were sought and believed achieved, particularly in the SPAU. Based on comparative studies of these implementations and SSI/MSI/LSI alternatives, a large saving in board space, power, and interconnections results from using these generic type LSI chips developed by this program.

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Document Details

Document Type
Technical Report
Publication Date
Dec 01, 1977
Accession Number
ADA057874

Entities

People

  • J. L. Buie

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies
  • Space

DTIC Thesaurus Topics

  • Arithmetic Units
  • Computer Programming
  • Computers
  • Delay Lines
  • Logic
  • Logic Gates
  • Oxides
  • Plastic Explosives
  • Power Supplies
  • Prosthetics
  • Shift Registers
  • Signal Processing
  • Space Systems
  • Standards
  • Three Dimensional
  • Transducers
  • Voltage

Readers

  • Neurodegenerative Parkinson's Disease and Rickettsial Disease handbook, including the data level of dopamine, BC, neurons, and PD.
  • Parallel and Distributed Computing.
  • Software Engineering

Technology Areas

  • Space