Reliability and Performance Models for Error Correcting Memory and Register Arrays.
Abstract
Current digital system design practices make heavy utilization of various types of memories. RAMS and ROMS are used in main memory, register files, caches, and microstores. As a result, it becomes important to recognize the implications of memory chip failure modes for system reliability. A brief survey of available memory chip failure mode data is made and shows that partial chip failures are more prevalent than whole chip failures. Based on the findings of this survey, reliability models for memory systems with error coding techniques are developed. The effect of memory support circuitry on memory reliability, usually ignored in the development of analytical models, is included. It is shown that for wide ranges of memory system parameters and memory element failure rates the memory system reliability is dominated by the effect of the support electronics. The use of these models in design tradeoff decisions is explored. The performance of systems with fault tolerant memory when there are correctable failures present, an area which has seen little work, is analyzed. Performance models for systems with fault tolerant main memory, as well as those with fault tolerant microstore, are developed and their properties explored.
Document Details
- Document Type
- Technical Report
- Publication Date
- May 22, 1978
- Accession Number
- ADA058742
Entities
People
- Daniel P. Siewiorek
- Steven A. Elkind
Organizations
- Carnegie Mellon University