Bit Synchronizer System Performance Evaluation Study.
Abstract
Experimental investigations conducted with state-of-the-art bit synchronizer systems have shown that variations in performance exist between modes of operation within a system and between systems made by different manufacturers. Generalized and limited performance specifications and instructions do not provide sufficient performance data to determine expected performance in the wide range of systems applications. Performance measurements were made using a 2047 bit pseudo random non-return-to-zero-level (NRZ-L) pulse code modulation (PCM) input signal at two bit rates and two loop bandwidth selections. The two bit rates, 0.1 and 1.0 megabits, were selected to determine responses in the low- and mid-range data rate selections. The two loop bandwidths, 0.3 and 1.0 percent, were selected to determine responses with narrow- and mid-range loop selections which were common to the bit synchronizers tested. The loop bandwidth selections chosen for testing were the only two that were the same between systems. The input signal was filtered at a cutoff frequency equivalent to 0.75 x bit rate selected and the signal-to-noise ratio (SNR) was changed as required per the specific test requirement. Measurements were made to determine characteristic responses relative to bit error probability (BEP), bit slippage probability (BSP), acquisition (as a function of SNR and bit rate offset), and input bit jitter. The results of the experimental investigations with state-of-the-art bit synchronizer systems have shown that variations in performance characteristics exist. The results also indicate the need to establish performance standards and test methods for bit synchronizer systems. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jul 15, 1978
- Accession Number
- ADA061179
Entities
People
- D. R. Hust
- E. T. Kimball