Hardness Assurance for Neutron-Induced Displacement Effects in Semiconductor Devices.

Abstract

The objective of this program phase was to provide an effective means of purchasing semiconductor devices whose neutron-induced response is within known and acceptable limits. The scope of the effort was limited to those procedures for the neutron environment for bipolar transistors, temperature-compensated reference diodes, TTL(54/74) series digital integrated circuits, 741-type operational amplifiers and junction field effects transistors(JFET's). This final report covers the method by which the program objectives were met and provides background information for the companion document 'Hardness Assurance Guidelines for Displacement Effects for Bipolar Devices' (HDL-CR-78-135-1). Specifically this final report covers background lot sample statistical methods, assesses existing CRIC experimental neutron device data, and provides the background rationale for the selection of the Hardness Assurance controls. (Author)

Open PDF

Document Details

Document Type
Technical Report
Publication Date
May 22, 1978
Accession Number
ADA065162

Entities

People

  • Robert A. Berger

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Amplifiers
  • Bipolar Junction Transistors
  • Databases
  • Diodes
  • Electronics Laboratories
  • Field Effect Transistors
  • Information Science
  • Integrated Circuits
  • Logic
  • Logic Gates
  • Nand Gates
  • Operational Amplifiers
  • Power Electronics
  • Semiconductor Devices
  • Semiconductors
  • Transistors
  • Zener Diodes

Fields of Study

  • Physics

Readers

  • Instructional Design and Training Evaluation.
  • Integrated Circuit Design and Technology.
  • Nuclear and Radiation Engineering.

Technology Areas

  • Microelectronics