Fault Tolerant Spaceborne Computer Study. Preprocessor Design.

Abstract

This report defines an architecture for a highly reliable spaceborne communications processor. The processor was to be designed to perform the demodulation, decoding, de-interleaving, interleaving, encoding, formatting and routine tasks anticipated for the Air Force Nuclear Forces Communications Satellite. The goal was to define a system having a long-term reliability comparable to that of the SAMSO Fault-Tolerant Spaceborne Computer and having a comparably low redundancy overhead. This technical report will be updated in the future to present a more detailed picture of the Wide Band Signal Processor. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Jan 09, 1979
Accession Number
ADA067693

Entities

People

  • J. J. Stiffler

Organizations

  • RTX

Tags

Communities of Interest

  • Advanced Electronics
  • C4I
  • Energy and Power Technologies
  • Materials and Manufacturing Processes
  • Sensors
  • Space
  • Weapons Technologies

DTIC Thesaurus Topics

  • Air Force
  • Channel Spacing
  • Coding
  • Computer Programming
  • Computers
  • Control Systems
  • Data Storage Systems
  • Decoding
  • Demodulation
  • Demodulators
  • Modulation
  • Modulators
  • Operating Systems
  • Plastic Explosives
  • Reliability
  • Signal Processing
  • Waveforms

Fields of Study

  • Engineering

Readers

  • Computer Networking
  • Computer Science.
  • Software Engineering

Technology Areas

  • Space
  • Space - Satellites