Device Technology for High Performance Monolithic Sample-and-Hold Circuits.

Abstract

Development of devices for a monolithic sample and hold on a single chip was undertaken. Process developments were conducted to incorporate a p channel JFET and Schottky diodes into a high speed monolithic process. A test chip was designed and evaluated. The chip included test devices, test circuits and a complete sample-and-hold. The test results indicated that the devices were acceptable for sample and hold circuits. The test results of the sample and hold indicated 7 bit performance at sample rates of up to 50 Msps. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Oct 01, 1978
Accession Number
ADA067786

Entities

People

  • Alan S. Templin
  • Leon W. Hobrock

Tags

DTIC Thesaurus Topics

  • Ceramic Materials
  • Electronics Industry
  • Electronics Laboratories
  • Field Effect Transistors
  • Film Resistors
  • Frequency Response
  • Ionizing Radiation
  • Modules (Electronics)
  • Npn Transistors
  • P-N Junctions
  • Platinum
  • Power Electronics
  • Radiation Effects
  • Schottky Diodes
  • Semiconductor Devices
  • Semiconductors
  • Test And Evaluation

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  • Aerospace Test and Evaluation
  • Integrated Circuit Design and Technology.
  • Semiconductor Device Technology