Error Correction Coding with NMOS Microprocessors: Volume II. A 6800-Based 7, 3 Reed-Solomon Decoder.

Abstract

Design, operation and testing of a table-look-up microprocessor-based (Motorola MC6800) (7,3) Reed-Solomon decoder is presented. Decoder operation is fully illustrated by the use of error and erasure pattern examples. Exhaustive (complete) and random (Monte Carlo) testing is employed to exercise the decoder. Test results are analyzed and conclusions drawn relative to decoder performance. (Author)

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Document Details

Document Type
Technical Report
Publication Date
May 01, 1979
Accession Number
ADA073088

Entities

People

  • Eric N. Skoog
  • J. R. Hamalainen

Organizations

  • MITRE Corporation

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  • Counter IED
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  • Air Force
  • Algorithms
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  • Coders
  • Coding
  • Computer Programming
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  • Computers
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  • Decoding
  • Demodulators
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  • Instruction Set Architecture
  • Lessons Learned
  • Microprocessors
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