Design, Fabrication and Test of a CCD-Based Correlator/Convolver.
Abstract
A design has been selected for a CCD-based correlator/convolver having 256 stages of which two analog signals are multiplied. Projected performance goals are 60 dB range, operation up to 10 MHz, 1% relative correlation error, and less than 300 mW power dissipation. The design employs two dual-channel differential CCD's with surface channels, source-follower buffered switched floating gate taps at each stage, four-transistor MOSFET bridge multipliers, and diode injection input. Both by computer simulations, and by a series of test pattern mask measurements in three wafer fabrication phases. The various elements of the design in isolation and combination were evaluated. The test patterns series included component parts of the full correlator for independent evaluation, transistor multiplier and process characteristic variations, and in addition a complete prototype correlator with 32 stages. The results substantiate the theoretical predicted superiority of the 4-transistor bridge multiplier with dual differential input over previously fabricated multiplier designs due mainly to the cancellation of multiplier distortion terms by virtue of its bridge symmetry.
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 01, 1979
- Accession Number
- ADA079031
Entities
People
- Arthur M. Cappon
- Jay P. Sage
- Wolfgang M. Feist
Organizations
- RTX