Multiple Microcomputer Control Algorithm.

Abstract

The design, analysis and performance evaluation of the architecture of a mutiprocessor is presented. The architecture is a hierarchically structured, functionally distributed, multiple microcomputer system. Its operating system is a multi-level structure implemented in an optimal combination of hardware, firmware, and software. This architecture is suited to any application, such as process control or real-time system simulation, in which the basic computational tasks do not change in time. Control functions are distributed among the microcomputer; however, the scheduling and execution of these tasks is governed at each microcomputer level by a local, real-time operating system. This local operating system is implemented primarily in firmware to minimize overhead. However, the control structure is designed to be independent of implementation so that a variety of microcomputers can be utilized together. Moreover, it is possible to add to each local processor an additional subprocessor which implements the operating system.

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Document Details

Document Type
Technical Report
Publication Date
Sep 01, 1979
Accession Number
ADA080735

Entities

People

  • Gregory M. Wierzba
  • Larry M. Stephens
  • Michael N. Huhns
  • Robert O. Pettus
  • Ronald D. Bonnell

Organizations

  • University of South Carolina

Tags

Communities of Interest

  • Air Platforms
  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Air Force
  • Algorithms
  • Application Software
  • Computer Program Documentation
  • Computer Program Reliability
  • Computer Programming
  • Computer Programs
  • Computers
  • Floating Point Operations
  • Instruction Set Architecture
  • Lists (Data Structures)
  • Operating Systems
  • Parallel Computing
  • Parallel Processing
  • Scheduling (Production)
  • System Software
  • Unmanned Vehicles

Fields of Study

  • Computer science
  • Engineering

Readers

  • Parallel and Distributed Computing.