CCD Feasibility in High-Speed Data Sampling.

Abstract

The primary objective of this program was to prove the feasibility of using CCD delay lines for high-speed data sampling at 10 MHz, with 12-bit accuracy. Such a sampler would have broad applicability in ATE systems of the future. The vehicle for this study was a CCD high-speed sampler developed on Honeywell IR&D using the 2178 CCD developed at the Honeywell Solid State Electronics Center. The high-speed sampler was incorporated into a data acquisition system using a SYM-1 microcomputer. This system was used to measure device parameters including noise, leakage, transfer efficiency, and linearity. These measurements have shown not only that CCDs are a viable technology for high-speed sampling but that the technology is capable of higher speed performance and is ready to be applied to today's ATE problems. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Jun 01, 1980
Accession Number
ADA085331

Entities

People

  • C. L. Carrison
  • R. C. Reitan

Organizations

  • Honeywell International, Inc.

Tags

Communities of Interest

  • Materials and Manufacturing Processes
  • Space
  • Weapons Technologies

DTIC Thesaurus Topics

  • Charge Coupled Devices
  • Computer Programming
  • Computer Programs
  • Computers
  • Data Acquisition
  • Digital Data
  • Machine Languages
  • Operating Systems
  • Shift Registers
  • Signal Processing
  • Sine Waves
  • Solid State Electronics
  • Square Waves
  • System Software
  • Test Equipment
  • Waveform Generators
  • Waveforms

Readers

  • Computer Science/Computer Engineering/Data Science/Digital Signal Processing.
  • Integrated Circuit Design and Technology.

Technology Areas

  • Microelectronics
  • Microelectronics - Microelectromechanical Systems