Multiple Microprocessor System (MMS) Design Study. Volume I.
Abstract
This is a design for a Multiple Microprocessor System (MMS) to be built as part of the System Architecture Evaluation Facility (SAEF) being developed at RADC. The MMS was designed to be used in the modeling of a wide range of multiprocessor configurations for the purpose of evaluating their suitability to unique Air Force data processing requirements. The MMS accomplishes this goal by providing: (1) a set of processing elements built for emulation. (2) an extensive built-in performance monitor subsystem. (3) a time align control mechanism to keep the emulators aligned in time.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 01, 1980
- Accession Number
- ADA086065
Entities
Organizations
- Harris Corporation