Design of a System Initialization Mechanism for a Multiple Microcomputer.
Abstract
This thesis presents a design for a system initialization mechanism for a multiple processor system. The design is based upon a system of microprocessors (specifically the Intel 8086) being used with a set of application processes, as is common in many real time applications. The design is based upon the concepts of explicit communicating processes and explicit memory segmentation - although it does not require full hardware segmentation. With the goal of simplifying the system initialization function, this thesis segregates the required initialization actions into three distinct phases. The specific phase for each action is determined by which phase provides the most supportive environment for that particular action. While the initialization mechanism described in this thesis was developed for a particular real-time application, the design concepts described are applicable to a variety of hardware and operating system configurations.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 1980
- Accession Number
- ADA092137
Entities
People
- John Lee Ross
Organizations
- Naval Postgraduate School