A New Multiplier Structure for Digital Signal Processing

Abstract

The charge of this grant was the study of a new class of memory intensive digital arithmetic units based on modular algebra. The new class of arithmetic units, developed under this grant, operate at very high speeds, admit VLSI and bit-slice realizations, and can be integrated into digital signal processing systems.

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Document Details

Document Type
Technical Report
Publication Date
Jan 01, 1980
Accession Number
ADA093430

Entities

People

  • Fred J. Taylor

Organizations

  • University of Cincinnati

Tags

Communities of Interest

  • Energy and Power Technologies
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Accuracy
  • Adaptive Filters
  • Algorithms
  • Arithmetic
  • Arithmetic Units
  • Computers
  • Conversion
  • Data Compression
  • Databases
  • Digital Filters
  • Digital Signal Processing
  • Engineering
  • Filters
  • Filtration
  • Numbering Systems
  • Numbers
  • Signal Processing

Readers

  • Computer Programming and Software Development.
  • Parallel and Distributed Computing.
  • Plasma Physics / Magnetohydrodynamics