A Design Study for an Easily Programmable, High-Speed Processor with a General-Purpose Architecture

Abstract

A design study has been carried out for an easy-to-program high-speed signal processor. The machine achieves a throughput of about 25 million arithmetic operations per second by incorporating parallel addressing and data access into a general-purpose architecture. The study indicates that, for typical signal processing applications, nearly all of the instruction cycles can be used to perform primary arithmetic operations rather than data access or addressing. The proposed machine would require about 1165 ECL 100K chips, occupy 2-3 cubic feet, and consume about 700 watts.

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Document Details

Document Type
Technical Report
Publication Date
Oct 23, 1980
Accession Number
ADA094064

Entities

People

  • Douglas B. Paul
  • Joel A. Feldman
  • Vincent J. Sferrino

Organizations

  • Massachusetts Institute of Technology

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Access Time
  • Accuracy
  • Algorithms
  • Arithmetic
  • Circuits
  • Clocks
  • Computer Programming
  • Computers
  • Data Transmission
  • Digital Signal Processing
  • Engineering
  • Instruction Set Architecture
  • Instructions
  • Maximum Operation Depths
  • Precision
  • Signal Processing
  • Standards

Readers

  • Computer Science.
  • Electrical Engineering
  • Integrated Circuit Design and Technology.