Design of a Low Power Schottky TTL High-Speed Digital Phase-Locked Loop Integrated Circuit.

Abstract

A high speed digital phase-locked loop (DPLL) integrated circuit was successfully designed and implemented with Low Power Schottky technology. The Avionics Laboratory sponsored the development of the SN54LS297 DPLL IC, which was designed to become a standard Texas Instruments catalog part. This device uses strictly digital techniques to perform the first order phase-locked loop linear function and can be cascaded to form higher order phase filters. The center frequency and bandwidth are digitally programmable, and Q's of 8 to 130,000 can be obtained, making possible narrow-bandwidth phase tracking with higher resolution than conventional phase-locked loops. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Oct 01, 1980
Accession Number
ADA094729

Entities

People

  • James D. Gallia

Organizations

  • Texas Instruments

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Air Force
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  • Computers
  • Contracts
  • Detectors
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  • Fabrication
  • Flip Flop Circuits
  • Frequency
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  • Integrated Circuits
  • Phase Detectors
  • Semiconductors
  • Square Waves
  • Test And Evaluation
  • Test Equipment

Fields of Study

  • Physics

Readers

  • Integrated Circuit Design and Technology.
  • Radio communications and signal processing.