Programmable Image Processing Element.
Abstract
The objective of this 12-month exploratory development was to develop a general-purpose, digital, large-scale integrated circuit device, called the programmed image-processing element (PIPE), which can be programmed to perform a variety of signal-processing functions such as Cosine and Hadamard transforms, edge extraction, unsharp masking, pole-zero filtering, and signal smoothing. The PIPE devices can operate on 8 x 1 or 3 x 3 element data blocks. The PIPE LSIC is suited for those airborne applications where data rate, size, power, and weight restrictions prohibit the use of general-purpose microprocessors or high-speed digital multipliers. This article adresses only the design and photomask fabrication of the PIPE LSIC. During the design phase of the program, several architectures were investigated as candidates for implementing the PIPE LSIC. The read-only-memory (ROM)-accumulate architecture was selected, which maximizes flexibility in algorithm implementation and minimizes external control and timing logic. Investigations of ROM technologies and designs to ensure a user-oriented image-processing LSIC were conducted. The N-channel metal-oxide-semiconductor (NMOS) technology was selected to implement the PIPE LSIC because it is an established, cost-effective technology capable of providing the high-circuit density and low speed-power product. The user-erasable, programmable memory (EPROM) was judged to be the best memory technology to meet the goals of the PIPE LSIC. The PIPE LSIC design completed during this contract has five major sections: input latch/parallel-to-serial shift register, EPROM, shift-and-accumulate, tri-state output latch, and controller.
Document Details
- Document Type
- Technical Report
- Publication Date
- Nov 01, 1980
- Accession Number
- ADA100852
Entities
People
- J. F. Salzman
- Tom F. Cheek
- W. L. Eversole
Organizations
- Texas Instruments