High-Speed GaAs MESFET Memory Study.
Abstract
A design and analysis study of potential high-speed GaAs-MESFET memory circuits was performed. The results show that a 1-kbit static RAM having a 1-nsec access time is feasible. The design of the flip-flop memory cell uses low-power enhancement-mode MESFETs; power dissipation would be 5 microwatts per cell. To achieve maximum memory speed, the peripheral control and drive circuitry uses depletion-mode devices; total power dissipation would be about 1 W. Experimental testing and characterization of the memory circuit designs will be performed during the second phase of the program. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jul 01, 1981
- Accession Number
- ADA102252
Entities
People
- M. Waldner
- R. E. Lundgren
Organizations
- HRL Laboratories