VLSI Based Multiprocessor Communications Networks.
Abstract
An analysis of the impact of VLSI technology on the design of multiprocessor communications networks is presented. Models for partitioning networks in terms of subnetworks which reside on a single VLSI chip, and in terms of path bit slicing are shown. Pin limitations, intra and inter-chip network type and various VLSI technology parameters are included in the model and results of simulation studies yielding optimum partitioning strategies under a variety of conditions are given. Investigations of procedures for handling network control are detailed and a promising design which solves the plane synchronization problem is illustrated. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 01, 1981
- Accession Number
- ADA104747
Entities
People
- Donald F. Wann
- Mark A. Franklin
Organizations
- University of Washington