Analysis and Design of Fault-Tolerant Computer Systems.

Abstract

This is the final report of a four-year investigation of fault-tolerant computer systems. A comprehensive theory of fault tolerance for a class of computer interconnection networks called beta-networks was developed. Reconfiguration and recovery strategies in multiprocessor systems were studied using graph theoretical models. The testing requirements of bit-sliced computers were investigated, and a new approach to the design of easily testable bit-sliced systems was developed. The testing of complex LSI/VLSI systems was examined using a high-level and expandable representation of test data called vector sequences. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Aug 15, 1981
Accession Number
ADA105491

Entities

People

  • John P. Hayes

Organizations

  • University of Southern California

Tags

Communities of Interest

  • Human Systems

DTIC Thesaurus Topics

  • Abstracts
  • Air Force
  • Air Force Personnel
  • Central Processing Units
  • Computers
  • Electrical Engineering
  • Fault Tolerance
  • Fault Tolerant Computing
  • Information Science
  • Large Scale Integration
  • Microprocessors
  • Multiprocessors
  • Recovery
  • Research Facilities
  • Sequences
  • Two Dimensional
  • Very Large Scale Integration

Fields of Study

  • Engineering

Readers

  • Integrated Circuit Design and Technology.
  • Parallel and Distributed Computing.