Programming Processor Interconnection Structures

Abstract

Parallel computer architecture complicates the already difficult task of parallel programming in many ways, e.g., by a rigid interconnection structure, addressing complexity, and the shape and size mismatches. The CHiP computer is a new architecture that reduces these complications by permitting the processor interconnection structure to be programmed. This new kind of programming is explained. Algorithms are presented for several interconnection patterns including the torus and the complete binary tree and general embedding strategies are identified. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Oct 01, 1981
Accession Number
ADA109294

Entities

People

  • Lawrence H Snyder

Organizations

  • Purdue University

Tags

Communities of Interest

  • Air Platforms

DTIC Thesaurus Topics

  • Algorithms
  • Computer Programming
  • Computer Science
  • Computers
  • Contracts
  • Databases
  • Embedding
  • Language
  • Military Research
  • Packet Switching
  • Phase Transformations
  • Programming Languages
  • Specifications
  • Switches
  • Trees (Data Structures)
  • Words (Language)

Fields of Study

  • Computer science

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Parallel and Distributed Computing.
  • Structural Dynamics.