Essential Pattern and Sequence Sensitivity in Semiconductor Memories,
Abstract
Pragmatic classification of errors linked to a study of Essential Pattern and Sequence Sensitivity leads to a new and credible strategy for the validation of individual chips and entire memories. Three categories or errors are recognized: hard, non-random soft and random soft errors. Progress in the verification of VLSI devices is predicated on the availability of diagnostic instrumentation. Three promising techniques are being developed: (1) Stroboscopic Scanning Electron Microscopy; (2) the Zero-Capacitance Probe; and (3) Pseudo Analog Testing. More attention must also be given to the matter of process statistics. Lastly, much remains to be done at the system level. We consider error correction of the Hamming-code variety as a particularly efficient technique of fault-tolerant design and we discuss chip and system architectures for reduction of the risk of burst errors. All in all we advocate (1) conventional testing for hard errors attributable typically to stuck-at-faults, (2) extensive analysis and diagnostics for non-random soft errors produced more often than not by crosstalk manifested as Pattern or Sequence Sensitivity, and (3) block-oriented error correction for random errors induced most often by alpha particles and cosmic rays.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jul 15, 1980
- Accession Number
- ADA110263
Entities
People
- A. Tuszynski
Organizations
- University of Minnesota