An Implementation of MIL-STD-1750 Airborne Computer Instruction Set Architecture.

Abstract

This Memorandum describes the design of a processor implementing the Mil-Std-1750 Airborne Computer Instruction Set Architecture, using Advanced Micro Devices 2901 bit-slice microprocessor devices. The aspects of the hardware design and microcode specific to Mil-Std-1750 are discussed and reviewed in the light of the experience gained. A full listing of the AMD 'AMDASM' micro assembler definition file and microcode source text is included, together with a full hardware documentation. (Author)

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Document Details

Document Type
Technical Report
Publication Date
May 01, 1981
Accession Number
ADA114029

Entities

People

  • S. J. Shrimpton

Organizations

  • Royal Aircraft Establishment

Tags

Communities of Interest

  • Air Platforms
  • Energy and Power Technologies
  • Human Systems

DTIC Thesaurus Topics

  • Arithmetic
  • Artificial Intelligence
  • Circuits
  • Computer Architecture
  • Computers
  • Computing System Architectures
  • Control Panels
  • Engineering
  • Floating Point Operations
  • Instruction Set Architecture
  • Integrated Circuits
  • Machine Languages
  • Microarchitecture
  • Plastic Explosives
  • Self Assembly
  • Standardization
  • Standards

Readers

  • Aerospace Test and Evaluation
  • Computer Engineering
  • Parallel and Distributed Computing.