A Fast Turn-Around Facility for Very Large Scale Integration (VLSI)
Abstract
In order to appreciate the critical hardware and software problems associated with the definition and design of very large scale integrated circuits or integrated systems including 10 to the 4th power - 10 to the 6th power transistors in a single silicon ship, incisive experiments conducted with actual operating chips are indispensible. The objective of this project is to establish, within a university research environment, a facility for the rapid execution of mask generation, wafer fabrication, and functional testing of user- generated custom I.C. designs.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 1982
- Accession Number
- ADA115863
Entities
People
- James D. Meindl
- James D. Plummer
- John D. Shott
- R. Fabian Pease
- Robert W. Dutton
Organizations
- Stanford University