Efficient Modeling for Short Channel MOS Circuit Simulation.
Abstract
Existing circuit models for short-channel MOS transistors represent a compromise between computation speed and ease of use. Empirical models are very fast to evaluate, but their parameters must be fitted from experimental measurements. Theoretical models require longer computation time, but they may be used to predict the performance of new, unmeasured MOS technologies since their parameters are not curve-fitted from experimental data. This thesis combines the best features of both types of model, yielding a fast circuit simulator whose input parameters need not be extracted from experimental measurements. A nonlinear optimization algorithm is used to 'compile' the parameters of a theoretical model into parameters for an empirical model, providing the superior user-interface of theoretical models without sacrificing simulator execution speed. Results produced by a prototype model compiler are presented, showing the modeling error to be approximately 5 percent. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Aug 01, 1982
- Accession Number
- ADA121539
Entities
People
- Mark Griffin Johnson
Organizations
- Massachusetts Institute of Technology