LSI/VLSI Ion Implanted GaAs IC Processing

Abstract

This report covers the sixth quarter of a program aimed at fully realizing the potential of GaAs for digital integrated circuits employing depletion mode MESFETs. During this reporting period, large single crystals of GaAs have been grown by the Bridgman technique of Crystal Specialties. In the area of processing, a study was made of the dependence of threshold voltage on the post-implantation anneal time. This study indicates that the anneal time used in the IC process is adequate. LSI yield test structures consisting of long parallel meander lines were used to evaluate various options for metal depositions. Magnetron sputtering was the preferred technique. The yield of long chains of interconnects was also evaluated. The 8 x 8 multiplier circuit implemented with SD2FL gates was tested. Work continued on MESFET modeling. The effects of shortening source-drain gap were evaluated.

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Document Details

Document Type
Technical Report
Publication Date
Dec 01, 1982
Accession Number
ADA125014

Entities

People

  • A. Firstenberg
  • C. G. Kirkpatrick
  • P.M. Asbeck
  • Ricardo Zucca
  • Y. D. Shen

Tags

DTIC Thesaurus Topics

  • Air Force
  • Charge Density
  • Circuits
  • Contracts
  • Current Density
  • Electron Density
  • Electrons
  • Fabrication
  • Integrated Circuits
  • Ion Implantation
  • Materials
  • Microelectronics
  • North Carolina
  • Resistance
  • Scientific Research
  • Security
  • Two Dimensional

Fields of Study

  • Materials science

Readers

  • Electronics Engineering
  • Integrated Circuit Design and Technology.
  • Semiconductor Device Technology