A Two-Level Pipelined Systolic Array for Multi-Dimensional Convolution,
Abstract
This paper describes a systolic array for the computation of n-dimensional (n-D) convolutions of any positive integer n. Systolic systems usually achieve high performance by allowing computations to be pipelined over a large array of processing elements. To achieve even higher performance, the systolic array of this paper utilizes a second level of pipelining by allowing the processing elements themselves to be pipelined to an arbitrary degree. Moreover, it is shown that as far as orders of magnitude are concerned, the total amount of memory required by the systolic array is no more than that needed by any convolution device that reads in each input data item only once. Thus if only schemes that use the minimum-possible I/O are considered, the systolic array is not only high performance, but also optimal in terms of the amount of required memory. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Nov 01, 1982
- Accession Number
- ADA127544
Entities
People
- David W. L. Yen
- H. T. Kung
- Lawrence M. Ruane
Organizations
- Carnegie Mellon University