Transport in Submicron Mosfets.
Abstract
One of the main driving forces in solid-state electronics is the thrust to develop smaller and faster active devices, which dissipate very little power, for eventual use in large-scale integrated circuits. In most situations, however, the actual power-delay product of the device itself is not as important as constraints of charging the interconnection capacitances of the wiring. In this introduction, we show that there is a fundamental lower bound to the delay time itself. This limit arises from the necessity for heat removal, the necessary requirements for signal propagation, as well as the speed-power product itself. At the fundamental limit, the delay time is insensitive to modest variations in the actual speed-power product. At the opposite extreme, in the wire-dominated chip, the cell size is determined by wiring constraints rather than device constraints and the delay time is also independent of the speed-power product. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Aug 01, 1983
- Accession Number
- ADA129983
Entities
People
- D. K. Ferry
Organizations
- Colorado State University