NOSC Systolic Processor Testbed.

Abstract

NOSC(Naval Ocean Systems Center) has expended considerable resources in designing and fabricating a systolic array testbed and writing software utility programs for its exploitation. These tools now permit us to readily explore the hardware design tradeoffs for future generation systolic processors. However, we do not have the resources to explore all desirable paths. It will be to the Navy's benefit if the tools we do have are made available to other U.S. researchers (probably via telephone/modem access) for them to explore their particular algorithmic interests. This document describes the capabilities and usefulness of these tools. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Jun 01, 1983
Accession Number
ADA130590

Entities

People

  • J. J. Symanski

Tags

Communities of Interest

  • Advanced Electronics
  • C4I
  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Circuit Boards
  • Computer Programming
  • Computer Programs
  • Computers
  • Control Simulators
  • Data Storage Systems
  • Diagrams
  • Dynamic Range
  • Electronics
  • Linear Arrays
  • Object Code
  • Parallel Computing
  • Personal Computers
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Fields of Study

  • Computer science

Readers

  • Maritime and Naval Warfare Studies
  • Parallel and Distributed Computing.
  • Systems Analysis and Design