Analysis of an Error Detection Scheme for Parallel Computations.

Abstract

In this document the authors determine the conditions under which an error detection scheme based on strict redundancy can be used to increase confidence in the results of parallel computations. This study shows that the issues of speed and reliability of parallel processors are interdependent and must be considered jointly at the design stage.

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Document Details

Document Type
Technical Report
Publication Date
Nov 15, 1983
Accession Number
ADA134819

Entities

People

  • G. G. L. Meyer
  • H. L. Weinert

Organizations

  • Johns Hopkins University

Tags

DTIC Thesaurus Topics

  • Abstracts
  • Computations
  • Computers
  • Detection
  • Detectors
  • Electrical Engineering
  • False Alarms
  • Intervals
  • Parallel Computing
  • Parallel Processing
  • Parallel Processors
  • Probability
  • Probability Distributions
  • Redundancy
  • Reliability
  • Warning Systems

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