A Structured Design Methodology for VLSI Systems.
Abstract
New algorithms and tools for hierarchical design and verification of IC chips have been developed. The multi-level simulation capabilities of SABLE have been extended using the ADA language. Automatic synthesis of stick diagrams from net lists and subsequent pitch-constrained compaction of layout provide new capabilities for cell generation. New parallel algorithms for routing and design rule checking have been developed which are orders-of-magnitude faster than conventional approaches. Analytic models to accurately estimate and bound waveforms in MOS circuits have been developed and provide new insight for performance enhancement. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Nov 01, 1983
- Accession Number
- ADA135725
Entities
People
- R. W. Dutton
Organizations
- Stanford University