VLSI (Very Large Scale Integrated) Design of a 16 Bit Very Fast Pipelined Carry Look Ahead Adder.
Abstract
This thesis is an introduction to the use of computer-aided design (CAD) tools for the design of very large scale integrated circuits (VLSI). The techniques are described and a tutorial is given which illustrates their use in the computing environment at the Naval Postgraduate School. The CAD tools were applied to design a 16-bit fast pipelined adder. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 01, 1983
- Accession Number
- ADA136356
Entities
People
- B. R. Hauenstein
- J. R. Conradi
Organizations
- Naval Postgraduate School