Analysis of an Error Masking Scheme for Parallel Computations.

Abstract

The authors determine the conditions under which an error masking scheme based on strict redundancy can be used to increase our confidence in the results of parallel computations. This study shows that the issues of speed and reliability of parallel processors are interdependent and must be considered jointly at the design stage. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Dec 01, 1983
Accession Number
ADA136372

Entities

People

  • G. G. L. Meyer
  • H. L. Weinert

Organizations

  • Johns Hopkins University

Tags

DTIC Thesaurus Topics

  • Computations
  • Computer Science
  • Computers
  • Electrical Engineering
  • Engineering
  • Hypotheses
  • Military Research
  • Parallel Computing
  • Parallel Processing
  • Parallel Processors
  • Probability
  • Probability Distributions
  • Redundancy
  • Reliability
  • Signal Processing

Readers

  • Approximation Theory.
  • Parallel and Distributed Computing.