Impact of Electrostatics on IC (Integrated Circuit) Fabrication.

Abstract

Integrated circuit fabrication processes inherently involve materials with a high propensity of triboelectric charge generation. This report details the results of a study in which the intent was 1) to determine how electrostatic charges can catastrophically dame integrated circuits during their fabrication and 2) to investigate the effect these charges have on individual fabrication processes. Possible reliability implications of the presence of electric charges during fabrication are also hypothesized. An experiment was also carried out to determine the susceptibility of IC's in wafer form. In these tests, devices were stressed at various levels and then electrically tested to determine their functionality. Additionally, the susceptibility modes of devices in wafer form were compared to those in packaged form.

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Document Details

Document Type
Technical Report
Publication Date
Sep 01, 1983
Accession Number
ADA137372

Entities

People

  • T. Turner
  • W. K. Denson

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Charged Particles
  • Electricity
  • Electromagnetic Fields
  • Electrostatic Charge
  • Electrostatic Fields
  • Electrostatics
  • Epitaxial Growth
  • Fabrication
  • Failure Mode And Effect Analysis
  • High Temperature
  • High Voltage
  • Integrated Circuits
  • Photolithography
  • Semiconductor Manufacturing
  • Semiconductors
  • Silicon Dioxide
  • Static Electricity

Readers

  • Integrated Circuit Design and Technology.
  • Plasma Physics.