Modeling and Extraction of Interconnect Parameters in Very-Large-Scale Integrated Circuits.

Abstract

The increased complexity of the very large scale integrated circuits (VLSI) has greatly impacted the field of computer-aided design (CAD). One of the problems brought about is the interconnection problem. In this research, the goal is two fold. First of all, a more accurate numerical method to evaluate the interconnect capacitance, including the coupling capacitance between interconnects and the fringing field capacitance, was investigated, and the integral method was employed. Two FORTRAN programs 'CAP2D' and 'CAP3D' based on this method were developed. Second, a PASCAL extraction program emphasizing the extraction of interconnect parameters was developed. It employs the 'cylindrical approximation formula' for the self-capacitance of a single interconnect and other simple formulas for the coupling capacitances derived by a 'least square method'. The extractor assumes only Manhattan geometry and NMOS technology. Four-dimensional binary search trees are used as the basic data structure. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Aug 01, 1983
Accession Number
ADA142381

Entities

People

  • C. P. Yuan

Organizations

  • University of Illinois Urbana–Champaign

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Capacitance
  • Circuit Analysis
  • Circuits
  • Computational Science
  • Computer-Aided Design
  • Computers
  • Electrical Engineering
  • Engineering
  • Geometry
  • Impedance
  • Integrated Circuits
  • Large Scale Integrated Circuits
  • Operating Systems
  • Transmission Lines
  • Trees (Data Structures)
  • Two Dimensional
  • Very Large Scale Integration

Fields of Study

  • Engineering

Readers

  • Calculus or Mathematical Analysis
  • Integrated Circuit Design and Technology.