Test Procedures and Design Methods for Reliable Large Scale Integrated Circuits and Systems.

Abstract

The following four major problem areas were investigated in the course of the research supported: (1) procedures to detect faults in random access memories; (2) analysis and design of fault-tolerant computing networks; (3) design of testable microprocessors and iterative logic arrays; and (4) design and analysis of fault-tolerant connection networks. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Jan 01, 1984
Accession Number
ADA143324

Entities

People

  • S. M. Reddy

Organizations

  • University of Iowa

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Circuits
  • Complementary Metal-Oxide Semiconductors
  • Computers
  • Digital Circuits
  • Distributed Computing
  • Electrical Engineering
  • Engineering
  • Fault Tolerance
  • Fault Tolerant Computing
  • Information Science
  • Logic Gates
  • Microprocessors
  • Networks
  • Parallel Computing
  • Parallel Processing
  • Security
  • Semiconductors

Readers

  • Integrated Circuit Design and Technology.
  • Systems Analysis and Design