The Design and Performance Analysis of an Arbiter for a Multi-Processor Shared-Memory System
Abstract
A round-robin arbiter has been designed and implemented for sharing memory in a multi-processor system. A study is made, via analysis and simulation, of the performance of this arbiter under various load conditions. In particular, distributions are obtained for the waiting time of an arriving customer under various load conditions, and expressions are obtained for the idle time distribution and the mean busy time. The effect of a heavy or light user in the midst of other moderate users is also examined, as is the effect of longer guaranteed idle periods by individual customers after a service completion. Many of the results obtained with a round-robin arbiter are compared with those obtained using a First-come, First-served arbiter. In the course of doing this, a simple relation has been found between the waiting time distribution and the distribution of the number of customers in any discrete- time First-come, First-served system with a single work-conserving deterministic server.
Document Details
- Document Type
- Technical Report
- Publication Date
- Aug 01, 1984
- Accession Number
- ADA146074
Entities
People
- Shahrukh S. Merchant
Organizations
- Massachusetts Institute of Technology