Special Purpose Hardware Architectures for Language Recognition,
Abstract
Two distinct chip architectures for language recognition are presented. THe first allows a recogniser for any regular expression to be constructed by simply assembling predefined cells linto a linear array. The cells correspond to the symbols which can occur in a regular expression, and the appropriate cells are placed in a line in the same order as the expression. The recogniser is then correct by construction, and all inter-cell connections are made automatically. The second architecture can be programmed to recognise any LL(1) context-free language by loading it with the appropriate grammar rules. The grammar rules are embodied within and array of identical cells, which, in conjunction with a standard LIFO stack, form the recognition hardware. Additional keywords: Syntactic pattern recognition; Parsers; VLSI; Context free grammar. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 01, 1985
- Accession Number
- ADA156634
Entities
People
- J. D. Morison
- R. A. Evans
Organizations
- Royal Signals and Radar Establishment