Bulk CMOS VLSI Technology Studies. Part 3. A 1.2 Micron CMOS Data Path Chip.
Abstract
A 16-bit, 1.2 micron CMOS data path chip is presented. The chip consists of two I/O ports, a 22 register scratch pad memory, a general purpose ALU, and a barrel shifter. The chip is designed to operate with a two-phase clock and is microcode controlled by a 22-bit phase 1 microword and a 13-bit phase 2 microword. The chip has a 64-pad frame with 3 pads not connected. The circuitry and layouts for this data path chip are presented. How the chip can be functionally tested is included, and enhancements for a second generation chip are discussed.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 17, 1985
- Accession Number
- ADA158368
Entities
People
- C. W. Jones
- J. D. Trotter
Organizations
- Mississippi State University