A Unified Approach to the Analysis and Synthesis of Systolic Arrays.

Abstract

This thesis takes the first steps toward the development of a theoretical framework to unify the analysis and synthesis of systolic networks. We describe a class of transformations on systolic networks that alter the topology of a network while preserving the timing of its computations. These transformations may be used to demonstrate the equivalence of two existing systolic designs or to obtain a new design from an existing one, according to particular design specifications. We present our model of systolic network and then identify the parameters that we use ot characterize one. Next, we prove the correctness of two types of transformations on these parameters. We show how these transformations can account for different processor types and multiple processor states. Finally, we demonstrate these transformations and characterize those that avoid the phenomenon of 'crossing.' Keywords: Systolic arrays; Parallel algorithms; Matrix computations; Discrete convolution; Very Large Scale Integration Design. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Apr 01, 1985
Accession Number
ADA161326

Entities

People

  • Scot W. Hornick

Organizations

  • University of Illinois Urbana–Champaign

Tags

Communities of Interest

  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Arrays
  • Classification
  • Computational Science
  • Computations
  • Computing System Architectures
  • Contracts
  • Convolution
  • Crossings
  • Decomposition
  • Electronics
  • Engineering
  • Linear Systems
  • Networks
  • Security
  • Semiconductor Devices
  • Semiconductors
  • Two Dimensional

Fields of Study

  • Engineering

Readers

  • Mathematical Modeling and Probability Theory.
  • Parallel and Distributed Computing.
  • Systems Analysis and Design