A Simulation Program with Latency Exploitation and Node Tearing.

Abstract

Circuit simulation has become an indispensable tool in the design of integrated circuits. Standard circuit simulators, such as SPICE (1), can predict accurately the circuit performance. However, the use of these simulators is limited to circuits of several hundred transistors. As the size and complexity of the integrated circuit increase, the memory and cpu time requirements for such an analysis become prohibitive. Keywords: Subcircuit; SPICE 2; Node tearing.

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Document Details

Document Type
Technical Report
Publication Date
Feb 01, 1985
Accession Number
ADA161379

Entities

People

  • Tat Kwan E. Yu

Organizations

  • University of Illinois Urbana–Champaign

Tags

Communities of Interest

  • Energy and Power Technologies
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Circuit Analysis
  • Circuits
  • Differential Equations
  • Digital Circuits
  • Energy Storage
  • Equations
  • Illinois
  • Integrated Circuits
  • Lists (Data Structures)
  • Logic Gates
  • Networks
  • Real Variables
  • Simulations
  • Simulators
  • Standards
  • Tensile Strength
  • Universities

Fields of Study

  • Engineering

Readers

  • Computational Modeling and Simulation
  • Computer Networking
  • Microwave Engineering.