An Analysis and Simulation of the CRAY X-MP Memory System.

Abstract

The CRAY X-MP 2- and 4-processor memory systems are analyzed and simulated using an instruction-level timing simulation of up to 16 processors. This study indicates a disturbing counter-intuitive trend to longer delays in vector accesses as both the number of processors and memory banks increase proportionately. This delay appears to be related to access start-up delays, which are determined for various memory organizations. Keywords include: Supercomputers; Simulation; and Parallel processors.

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Document Details

Document Type
Technical Report
Publication Date
Sep 01, 1985
Accession Number
ADA162769

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  • Donald Albert Calahan

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  • University of Michigan

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