The Simulation and Analysis of a RTL Model of the Motorola MC68000 Microprocessor with N.MPC. Volume 1.

Abstract

In a prior thesis project, a functional level model of portions of the Motorola MC68000 microprocessor was developed using signal analysis supported by limited technical data. Representative parts of the instruction set and exception processing structure were modeled with the Computer Design Language (CDL). In this follow-on thesis, those CDL models are transformed into equivalent models using ISP', an enhanced version of the Instruction Set Processor (ISP) hardware design language. This language transformation enabled the models to be simulated using N.mPc, a VAX 11/780-hosted software package developed specifically to support the design of digital systems. To evaluate the correctness of the models, the simulation results are analyzed against signal data gathered with the aid of a logic analyzer during the actual operation of the MC68000 when processing the modeled instructions. The accuracy and completeness of the models suggest that this functional approach to microprocessor modeling is a valid one.

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Document Details

Document Type
Technical Report
Publication Date
Dec 01, 1984
Accession Number
ADA164203

Entities

People

  • Charles A. Baxley Jr

Organizations

  • Air Force Institute of Technology

Tags

Communities of Interest

  • Advanced Electronics
  • Weapons Technologies

DTIC Thesaurus Topics

  • Accuracy
  • Assembly Languages
  • Computer Architecture
  • Computer Programming
  • Computer Programs
  • Computers
  • Computing System Architectures
  • Debugging
  • Engineering
  • Instruction Set Architecture
  • Instructions
  • Language
  • Microcode
  • Microprocessors
  • Operating Systems
  • Programming Languages
  • Simulations

Fields of Study

  • Engineering

Readers

  • Atmospheric Science/Meteorology
  • Computer Engineering
  • Software Engineering.