The Vote Tallying Chip: A Custom Integrated Circuit.

Abstract

A custom integrated circuit with applications to computer vision has been designed and fabricated. It is the first generation of a series of circuits that can act as specialized hardware for finding maxima in a distribution that is constructed by vote tallying. Many applications in artificial intelligence use peaks of histograms or areas of high density in distribution as the basis for decisions. This series of designs is meant to operate in those domains where histograms are constructed by tallying samples. The current design simply constructs the histogram given a stream of samples. An extension of content addressable memory is used to tally the samples. The design has been made fast by extensive use of pipelining. Keywords include: VLSI, Hough Transform, Cluster Analysis, Histogram, Artificial Intelligence, Computer Vision, and Systollic Array.

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Document Details

Document Type
Technical Report
Publication Date
Nov 01, 1984
Accession Number
ADA165854

Entities

People

  • Avadis Tevanian
  • David Sher

Organizations

  • University of Rochester

Tags

Communities of Interest

  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Artificial Intelligence
  • Circuits
  • Classification
  • Computer Science
  • Computer Vision
  • Computers
  • Content Addressable Memory
  • Demographic Cohorts
  • Detectors
  • Fabrication
  • High Density
  • Histograms
  • Integrated Circuits
  • Pattern Recognition
  • Recognition
  • Security
  • Simulations

Readers

  • Approximation Theory.
  • Integrated Circuit Design and Technology.
  • Neural Network Machine Learning.

Technology Areas

  • AI & ML
  • AI & ML - Bayesian Inference
  • AI & ML - DoD AI Strategy