High Performance Parallel Computing.
Abstract
The 1984/85 accomplishments of the research project High Performance Parallel Computing included bringing the prototype of the Texas Reconfigurable Array Computer (TRAC) to a configuration and to a state of stability where it could support execution of simple assembly language programs, initial development of a unified model of parallel computation which is a basis for a programming environment uniting process and data flow models of parallel computation, bringing to operational status on an alternative host one of the two parallel programming languages (the Computation Structures Language, CSL) originally intended for use on TRAC, exploration of the expressive capabilities of this programming language, initiation of development of a graphical programming language based on the unified model of parallel computation mentioned preceding, major progress on a graphically interfaced Petri Net-based performance modeling system for parallel computations and development of algorithms for scheduling of circuits to realize configurations in configurable banyan network based computer architectures.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jan 22, 1986
- Accession Number
- ADA169981
Entities
People
- G. J. Lipovski
- J. C. Browne
Organizations
- University of Texas at Austin