Fault Tolerance in Parallel Architectures.

Abstract

This paper describes a proposed automatically reconfigurable cellular architecture. The unique feature of this architecture is that the reconfiguration control is distributed within the system. There is no need for global broadcasting of switch settings. This reduces the interconnection complexity and the length of data paths. The system can reconfigure at the request of the applications software or in response to detected faults. This architecture supports fault tolerant applications since the reconfiguration can be self-triggered from within. The complete reconfiguration process can proceed without external interference. (Author)

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Document Details

Document Type
Technical Report
Publication Date
May 30, 1986
Accession Number
ADA170245

Entities

People

  • F. G. Gray

Organizations

  • Virginia Tech

Tags

Communities of Interest

  • Air Platforms
  • Biomedical

DTIC Thesaurus Topics

  • Algorithms
  • Arrays
  • Automata
  • Cellular Structures
  • Clocks
  • Computations
  • Computers
  • Computing System Architectures
  • Electrical Engineering
  • Engineering
  • Fault Tolerance
  • Parallel Computing
  • Parallel Processing
  • Parallel Processors
  • Scientists
  • Simulations
  • Two Dimensional

Fields of Study

  • Computer science
  • Engineering

Readers

  • Parallel and Distributed Computing.