A Design by Example: Regular Structure Generator.

Abstract

This thesis investigates technical issues concerning the automated generation of highly regular VLSI circuit layouts (e.g. RAMs, PLAs, systolic arrays) that are crucial to the designability and realizability of large VLSI systems. The key is to determine the most profitable level of abstraction, which is accomplished by the introduction of true macro abstraction, interface inheritance, delayed binding, and the complete decoupling of procedural and graphical design information. These abstraction mechanisms are implemented in the Regular Structure Generator, an operational layout generator with significant advantages over first generation layout tools. Its advantages are demonstrated by a pipelined array multiplier layout example. A leaf cell compactor that can make the RSG technology transportable is also investigated. (Author)

Open PDF

Document Details

Document Type
Technical Report
Publication Date
Feb 01, 1985
Accession Number
ADA170836

Entities

People

  • Cyrus S. Bamji

Organizations

  • Massachusetts Institute of Technology

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Air Force
  • Algorithms
  • Ambiguity
  • Boundaries
  • Coding
  • Compilers
  • Computer Programming
  • Computer Programs
  • Computer Science
  • Computer-Aided Design
  • Computers
  • Coordinate Systems
  • Electrical Engineering
  • Electronics
  • Language
  • Lisp Programming Language
  • Standards

Fields of Study

  • Engineering

Readers

  • Integrated Circuit Design and Technology.
  • Parallel and Distributed Computing.
  • Systems Analysis and Design